In recent years, a reduction in sensitivity in association with a reduction in pixel size has been a matter of concern in solid-state imaging devices such as CCD (Charge Coupled Device) and CMOS (Complementary Metal Oxide Semiconductor) image sensors. There is therefore proposed a solid-state imaging device that makes it possible to increase an aperture ratio of a photoelectric conversion region by forming a photoelectric conversion layer in an upper layer of a silicon substrate to achieve an improvement in sensitivity.
In such a solid-state imaging device, a photoelectric conversion film is provided between a pair of electrodes; however, in some cases, it is difficult to physically separate the photoelectric conversion film for each pixel. In this case, one or both of the pair of electrodes are physically separated for each pixel to allow for electrical element isolation without separating the photoelectric conversion film.
However, in this configuration, a distance between electrodes (hereinafter referred to as “pixel electrodes”) separated for each pixel is decreased in association with the reduction in pixel size. Accordingly, when a potential difference arises between adjacent pixel electrodes, electrical leakage between adjacent pixels is caused by capacitive coupling through the photoelectric conversion film. The electrical leakage causes crosstalk of signals between the adjacent pixels.
There is a technique of suppressing the crosstalk. In the technique, a wire for potential control and an insulating film are provided between adjacent pixel electrodes, and a potential barrier in a photoelectric conversion film is increased by an electric field effect of the wire for potential control to suppress leakage. Moreover, there is proposed a technique of decreasing capacitive coupling between pixel electrodes by providing a shield wire between adjacent pixels.